Integrated circuit (IC) chips are typically packaged in plastic encapsulant to provide circuit protection from hostile environments and facilitate chip electrical interconnection to a substrate or printed wire board (PWB). By far the most common plastic package for active IC devices is a molded plastic package. With a few variations, the same basic package assembly process is used to fabricate either pin-in-hole packages (such as dual-in-line packages (DIPs)) or surface mounted components, such as thin small-outline packages (TSOPs).
Construction of a molded plastic package begins with a metal lead frame that is usually made by stamping, although for cases in which fine dimensions are required the lead frame may be made by chemical etching. Stamped lead frames are generally preferred because of a lower fabrication cost. Lead frame thickness is typically 250 .mu.m (10 mils), but may be as thin as 150 .mu.m (6 mils) today for higher lead count packages.
The lead frame is the central supporting structure of a chip package to which every other element is attached. Etched or stamped from a thin sheet metal strip into a filigree of narrow fingers that radiate from a center platform, the frame carries the chip throughout the assembly process and is embedded in plastic after molding. Bonded to the lead frame's central platform is a semiconductor chip which, in turn, is electrically connected to the radiating fingers of the frame with fine-diameter wires. This assembly of chip, wires and frame is then covered with a thermoset plastic in an operation called transfer molding. With the body defined in rigid plastic, the leads are trimmed, formed, and plated to finish the package.
Further, due to inherent advantages such as small component size, reduced board area requirements, decreased cost and shorter signal paths, surface mount technology is gaining acceptance in the art for mounting components to substrates. In a typical surface mount manufacturing process, solder paste is placed on conductive pads or regions of a substrate such as a circuit board, using a screen or stencil printing operation. A component is placed on the board with its leads contacting the solder paste and a reflow operation is performed to melt the solder and create a solder bond between each lead and its corresponding conductive region.
In order to minimize stress at the chip attach, it may be desirable to have a lead frame material with a low coefficient of thermal expansion (CTE), for example, close to that of silicon (Si). The materials most commonly used for lead frames in molded packages are copper or nickel-iron alloys.
Unfortunately, surface mounted modules (such as TSOPs) often show early solder joint cracking when subjected to thermal cycle stress. Cracks typically occur at the rigid solder interface joining an outer lead end (or foot) with a wire bonding card. This is attributable to the thermal coefficient of expansion mismatch between the module body, the module lead and the substrate. The problem is compounded in the case of TSOP technology since the leads are short and there is little elastic deformation available to buffer strain experienced by the solder joints.
Thus, a need exists in surface mounting technology for a more compliant lead configuration to reduce resultant solder joint stress due to TCE (particularly in the case of TSOP). The present invention addresses this need.